MTDT 2006 - Call for Papers

CALL FOR PAPERS

- Submission Deadline Extended to 5 April, 2006 -

Objective -- Scope -- Submissions -- Important Dates -- About Taiwan and Taipei -- Further Information -- Committees

Objective

Following the traditions set up by its predecessors, MTDT06 will provide a forum dedicated to the recent advancements of the memory technology, covering topics such as memory device, circuit design, architecture, fabrication process, verification, yield analysis testing/diagnosis/repair for all kinds of memory such as SRAM, DRAM, Flash memory, EPROM, EEPROM, embedded memories, 3-D memories, content addressable memories, etc.

Scope

Original contributions related to memory design and test technology are solicited. Topics of interest include, but are not limited to, the following categories:

Next-generation memory device
Memory testing
Next-generation memory process
Memory built-in self-test
DRAM cell design
Memory diagnosis & repair
Flash cell design
Cell Characterization
Cache memory design
Failure analysis
Multi-port SRAM design
Fault modeling
High-speed memory design
Yield analysis
Low-power memory design
Reliability analysis
Fault-tolerant architecture
Memory for space application
Memory compiler
Verification methodology

Submissions

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Submission should be made electronically at the workshop web site, i.e., http://larc.ee.nthu.edu.tw/~mtdt06. A submission should contain a complete manuscript of less than 5000 words with an abstract of less than 200 words. A submission will be considered as evidence that once accepted the author(s) will prepare the final manuscript in time for being included in the proceedings and will present the paper at the workshop. Papers accepted will be published in a formal proceeding.

Important Dates

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Submission deadline: April 5, 2006 (extended)
Notification of acceptance: April 25, 2006
Deadline for final manuscript: May 15, 2006

About Taiwan and Taipei

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Taiwan is an island of 36,000 square kilometers, 70% of which are covered by spectacular mountains. With a population of about 23 million, Taiwan is one of the world's major IC design and manufacturing centers. Taipei, a modern city of more than 3 million people, is located in the northern part of Taiwan, and the capital of Taiwan.

Further Information

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Email: mtdt06@larc.ee.nthu.edu.tw

URL: http://larc.ee.nthu.edu.tw/~mtdt06

Committees

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Steering Committee

Rochit Rajsuman, Advantest, USA
Thomas Wik, Deep-µ Silicon Solution, USA
Robert Evans, MOSAID, USA

Organizing Committee

General Co-Chairs
Rochit Rajsuman, Advantest, USA
Cheng-Wen Wu, National Tsing-Hua U., Taiwan

Program Chair
Shi-Yu Huang, National Tsing-Hua U., Taiwan

Finance Chair
Chih-Tsun Huang, National Tsing-Hua U., Taiwan

Local Arrangements Chair
Ya-Chin King, National Tsing-Hua U., Taiwan

Publications Chair
Jin-Fu Li, National Central U., Taiwan

Registration Chair
Shyue-Kung Lu, Fu-Len Catholic U., Taiwan

Program Committee

Robert Aitken, Artisan, USA
Robert Aitken, Artisan, USA
Roger Barth, Intel, USA
Wu-Tung Cheng, Mentor Graphics, USA
Bruce Cockburn, U. of Alberta, Canada
Travis Cho, Powerchip Semi. Corp., Taiwan
Shine Chung, TSMC, Taiwan
Christophe Frey, ST Microelectronics, France
Jan Van Houdt, IMEC, Belgium
Andre Ivanov, U. of British Columbia, Canada
Ding-Ming Kwai, IP Library Inc., Taiwan
Chung Lam, IBM, USA
Fabrizio Lombardi, Northeastern U., USA
Chih-Yuan Lu, Macronix, Taiwan
Martin Margala, U. of Rochester, USA
Erik Jan Marinissen, Philips, Netherlands
Sharon Murray, Medtronic Micro, USA
Paolo Prinetto, Politecnico di Torino, Italy
Joe Ting, Etron Tech. Inc., Taiwan
Star Sung, Imaging Tek, Taiwan
Joerg Vollrath, Infineon Tech. Inc., German
Vyacheslav Yarmolik, BSUIR, Belarus
Yervant Zorian, Virage Logic, USA

For more information, visit us on the web at: http://larc.ee.nthu.edu.tw/~mtdt06/index.htm

The IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2006) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC), the Technical Committee on VLSI, and the National Tsing-Hua University, Taiwan in cooperation with the National Science Council, Taiwan, and the Ministry of Education, Taiwan.

CALL FOR PAPERS
- Submission Deadline Extended to 5 April, 2006 - Objective -- Scope -- Submissions -- Important Dates -- About Taiwan and Taipei -- Further Information -- Committees
Objective
Following the traditions set up by its predecessors, MTDT06 will provide a forum dedicated to the recent advancements of the memory technology, covering topics such as memory device, circuit design, architecture, fabrication process, verification, yield analysis testing/diagnosis/repair for all kinds of memory such as SRAM, DRAM, Flash memory, EPROM, EEPROM, embedded memories, 3-D memories, content addressable memories, etc.
Scope
Original contributions related to memory design and test technology are solicited. Topics of interest include, but are not limited to, the following categories: Next-generation memory device Memory testing Next-generation memory process Memory built-in self-test DRAM cell design Memory diagnosis & repair Flash cell design Cell Characterization Cache memory design Failure analysis Multi-port SRAM design Fault modeling High-speed memory design Yield analysis Low-power memory design Reliability analysis Fault-tolerant architecture Memory for space application Memory compiler Verification methodology
Submissions	top
Submission should be made electronically at the workshop web site, i.e., http://larc.ee.nthu.edu.tw/~mtdt06. A submission should contain a complete manuscript of less than 5000 words with an abstract of less than 200 words. A submission will be considered as evidence that once accepted the author(s) will prepare the final manuscript in time for being included in the proceedings and will present the paper at the workshop. Papers accepted will be published in a formal proceeding.
Important Dates	top
Submission deadline: April 5, 2006 (extended) Notification of acceptance: April 25, 2006 Deadline for final manuscript: May 15, 2006
About Taiwan and Taipei	top
Taiwan is an island of 36,000 square kilometers, 70% of which are covered by spectacular mountains. With a population of about 23 million, Taiwan is one of the world's major IC design and manufacturing centers. Taipei, a modern city of more than 3 million people, is located in the northern part of Taiwan, and the capital of Taiwan.
Further Information	top
Email: mtdt06@larc.ee.nthu.edu.tw URL: http://larc.ee.nthu.edu.tw/~mtdt06
Committees	top
Steering Committee Rochit Rajsuman, Advantest, USA Thomas Wik, Deep-µ Silicon Solution, USA Robert Evans, MOSAID, USA Organizing Committee General Co-Chairs Rochit Rajsuman, Advantest, USA Cheng-Wen Wu, National Tsing-Hua U., Taiwan Program Chair Shi-Yu Huang, National Tsing-Hua U., Taiwan Finance Chair Chih-Tsun Huang, National Tsing-Hua U., Taiwan Local Arrangements Chair Ya-Chin King, National Tsing-Hua U., Taiwan Publications Chair Jin-Fu Li, National Central U., Taiwan Registration Chair Shyue-Kung Lu, Fu-Len Catholic U., Taiwan Program Committee Robert Aitken, Artisan, USA Robert Aitken, Artisan, USA Roger Barth, Intel, USA Wu-Tung Cheng, Mentor Graphics, USA Bruce Cockburn, U. of Alberta, Canada Travis Cho, Powerchip Semi. Corp., Taiwan Shine Chung, TSMC, Taiwan Christophe Frey, ST Microelectronics, France Jan Van Houdt, IMEC, Belgium Andre Ivanov, U. of British Columbia, Canada Ding-Ming Kwai, IP Library Inc., Taiwan Chung Lam, IBM, USA Fabrizio Lombardi, Northeastern U., USA Chih-Yuan Lu, Macronix, Taiwan Martin Margala, U. of Rochester, USA Erik Jan Marinissen, Philips, Netherlands Sharon Murray, Medtronic Micro, USA Paolo Prinetto, Politecnico di Torino, Italy Joe Ting, Etron Tech. Inc., Taiwan Star Sung, Imaging Tek, Taiwan Joerg Vollrath, Infineon Tech. Inc., German Vyacheslav Yarmolik, BSUIR, Belarus Yervant Zorian, Virage Logic, USA
For more information, visit us on the web at: http://larc.ee.nthu.edu.tw/~mtdt06/index.htm
The IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2006) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC), the Technical Committee on VLSI, and the National Tsing-Hua University, Taiwan in cooperation with the National Science Council, Taiwan, and the Ministry of Education, Taiwan.